1. Field of the Invention
The present invention is related to a display device and its method, and more particularly, to a display device and method that can speedily acquire the parameters to show images and thus improve the efficiency.
2. Description of Related Art
Nowadays, the digital display devices are capable of receiving analog images and converting these analog images into digital images for displaying. In order to perform the analog-to-digital converting step, a clock (SCLK) for sampling the analog images is needed. In the prior arts, the clock is obtained by using a synchronization processor to process a horizontal synchronous signal (Hsync) and a vertical synchronous signal (Vsync) and consequently generates the characteristics such as the frequencies of Hsync and Vsync, the polarities of Hsync and Vsync, and the number of Hsync pulses between two Vsync signals (Vtotal), etc. Once the characteristics of Hsync and Vsync are realized, the resolution of the image is estimated and then the clock can be obtained (SCLK=Htotal*Vtotal*(frequency of Vsync)).
However, the estimated resolution may be wrong or may not be obtained in some cases. For example, when the characteristics of Hsync are the same as those of Vsync, the resolution cannot be estimated. Besides, a complicated firmware and a large memory space may be necessary for estimating the resolution such that time for estimating the resolution and hardware cost increase.